Patent details

Basic Information

Publication number:

EP3170261

PCT Application Number:

US2015039673

Type:

European Patent Granted for LU

Legal Status:

Lapsed

Application number:

EP157397431

PCT Publication Number:

WO2016010808

First applicant's nationality:

Translation Language:

EPO Publication Language:

English

English Title of Invention:

PROGRAMMABLE INTEGRATED CIRCUIT HAVING DIFFERENT TYPES OF CONFIGURATION MEMORY

French Title of Invention:

CIRCUIT INTÉGRÉ PROGRAMMABLE COMPORTANT DIFFÉRENTS TYPES DE MÉMOIRE DE CONFIGURATION

German Title of Invention:

PROGRAMMIERBARE INTEGRIERTE SCHALTUNG MIT VERSCHIEDENEN ARTEN VON KONFIGURATIONSSPEICHERN

SPC Number:

Dates

Filing date:

09/07/2015

Grant date:

04/09/2019

EP Publication Date:

24/05/2017

PCT Publication Date:

21/01/2016

Claims Translation Received Date:

Translations Received Date (B1 EP Publication):

Translations Received Date (B2 EP Publication):

Translations Received Date (B3 EP Publication):

Publication date:

04/09/2019

EP B1 Publication Date:

04/09/2019

EP B2 Publication Date:

EP B3 Publication Date:

Lapsed date:

09/07/2020

Expiration date:

09/07/2035

Renunciation date:

Revocation date:

Annulment date:

Owner

From:

28/08/2019

 

 

Name:

Xilinx, Inc.

Address:

2100 Logic Drive, San Jose, California 95124, United States (US)

Inventor

Name:

KARP, James

Address:

United States (US)

Priority

Priority Number:

201414330922

Priority Date:

14/07/2014

Priority Country:

United States (US)

Classification

IPC classification:

G06F 11/18; G06F 17/50; H03K 19/0175; H03K 19/177;

Publication

European Patent Bulletin

Issue number:

201936

Publication date:

04/09/2019

Description:

Grant (B1)

Annual Fees

Annual Fee Due Date:

Annual Fee Number:

Expected Payer:

Last Annual Fee Payment Date:

Last Annual Fee Paid Number:

Payer:

Filing date	Document type	Number of pages