Patent details
EP1593014
Title:
DIGITAL SIGNAL PROCESSOR ARCHITECTURE OPTIMIZED FOR CONTROLLING SWITCHED MODE POWER SUPPLY
Basic Information
- Publication number:
- EP1593014
- PCT Application Number:
- PCT/US/2004/003174
- Type:
- European Patent Granted for LU
- Legal Status:
- Lapsed
- Application number:
- EP047081963
- PCT Publication Number:
- WO/2004/073149
- First applicant's nationality:
- Translation Language:
- EPO Publication Language:
- English
- English Title of Invention:
- DIGITAL SIGNAL PROCESSOR ARCHITECTURE OPTIMIZED FOR CONTROLLING SWITCHED MODE POWER SUPPLY
- French Title of Invention:
- ARCHITECTURE DE PROCESSEUR A SIGNAUX DIGITAUX OPTIMISE POUR COMMANDER UNE ALIMENTATION EN MODE COMMUTE
- German Title of Invention:
- ZUR STEUERUNG EINES SCHALTNETZTEILS OPTIMIERTE DIGITALSIGNALPROZESSORARCHITEKTUR
- SPC Number:
-
Dates
- Filing date:
- 04/02/2004
- Grant date:
- 25/05/2011
- EP Publication Date:
- 25/05/2011
- PCT Publication Date:
- 26/08/2004
- Claims Translation Received Date:
- Translations Received Date (B1 EP Publication):
- Translations Received Date (B2 EP Publication):
- Translations Received Date (B3 EP Publication):
- Publication date:
- 09/11/2005
- EP B1 Publication Date:
- 25/05/2011
- EP B2 Publication Date:
- EP B3 Publication Date:
- Lapsed date:
- 04/02/2012
- Expiration date:
- 04/02/2024
- Renunciation date:
- Revocation date:
- Annulment date:
Owner
- From:
- 24/06/2014
-
-
- Name:
- PAI CAPITAL LLC
- Address:
- 740 CALLE PLANO, CAMARILLO, CALIFORNIA 93012, United States (US)
History of Owners
- From:
- 04/02/2004
- To:
- 23/06/2014
- Name:
- Power-One Inc.
- Address:
- 740 Calle Plano, Camarillo, California 93012, United States (US)
Inventor
- Name:
- CHAPUIS Alain
- Address:
- Switzerland (CH)
Priority
- Priority Number:
- 361452
- Priority Date:
- 10/02/2003
- Priority Country:
- United States (US)
Classification
- Main IPC Class:
-
H02M 3/157;
| Filing date |
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